Design guide for SDRAM on ETRAX 100LX

The purpose of this document is to give you some help getting started with your ETRAX 100LX design. Any feedback of missing parts and what can be improved in this document is appreciated. For discussions and further questions we welcome you to contact us.

The ETRAX 100LX SDRAM interface

SDRAM net name	ETRAX 100LX pin name	Description
Data [31:0]	D[31:D00]	Data bus.
Address [22:1]	A[22:01]	Address bus.
CSD_[1:0]	RAS_[1:0]	SDRAM chip selects, one for each SDRAM group.
RAS_	A25	Row address strobe.
CAS_	A24	Column address strobe.
DQM[7:0]	CASB_[3:0] - CASA_[3:0]	Data qualify mask. Controls the data output buffers in read mode. In write mode it masks the data being written to the memory array.
SDRAMWE_	A23	SDRAM write enable.
CLK	RAS2_	SDRAM master clock.
CKE	RAS3_	Clock enable. Activates the clock signal when high and deactivates when low.

The SDRAM interface is clocked by 50 MHz and supports 16-, 32- and 64-bit bus connections. There is support for two groups of SDRAM chips. A group is the set of SDRAM chips that collectively make up 16, 32 or 64 bits wide of data. The groups are controlled by the chip selects, CSD0_ and CSD1_.

If both groups are used, one group active with CSD0_ and the other with CSD1_, the chip configuration of both groups must be the same.

If you connect more than two chips to the ETRAX 100LX SDRAM_CLK output, it's recommended to use a zero-delay clock buffer circuit to buffer the signal.

Additional information is available in ETRAX 100LX Designer's Reference Chapter 5.

Since the SDRAM interface transfers data at high speed it is important to make the PCB design correct. Here is some advice:

Keep signal paths as short as possible.
Place decoupling capacitors close to the SDRAM chip. Use 100 nF for each VCC pin and 1uF for each chip.
Try to keep signal traces of same characteristics to equal length.
Avoid trace stubs.
Make sure that you use a proper ground plane.
Add passives to the CLK trace so that it can be filtered easily if needed.
Resistors used for termination on the data bus should be placed near the chip.

Implementation examples

8 Mbyte (1Mx16x4): A schematic drawing showing how to interface an 8 Mbyte (16 bit wide) SDRAM chip to ETRAX 100LX.
16 Mbyte (1Mx16x4) x 2: A schematic drawing showing how to interface two 8 Mbyte (16 bit wide each) in 32 bit mode to ETRAX 100LX.
8/16/32 Mbyte (1/2/4Mx16x4): Since the 8, 16 and 32 Mbyte chip in 16 bit and 4 banks configuration are quite pin compatible, the same PCB pads can be used for all of these. The extra component that is needed is a resistor that configures the bank addressing correctly. Look at the circuit diagram for further details.
8/16 Mbyte (1Mx16x4) (x2): This example shows how to use one chip in 16 bit mode or two chips in 32 bit mode. This design is useful if you want to use the same SDRAM pads on your PCB for a single chip in 16 bit mode and use same pads for a 16 bit chip in 32 bit mode. The trick is to mix the address lines so the chip gets the correct signals in both modes. Of course you will need some extra resistors to set your wanted configuration.
1 DIMM module: It is possible to connect a standard PC-100/133 DIMM module to ETRAX 100LX which is shown in this example. Note that the bank address signals are generated on the address bus after the group address. I.e. if the group addresses are A2 to A10, the bank addresses are A11 to A12. This means that depending on the size of the DIMM and how many group address bits it uses, different address bits of the ETRAX 100LX address bus needs to be connected to BA0 and BA1. Look this up in the DIMM manufacturer datasheet. Optionally the I2C bus can be connected to the SDA pin and SCL pin of the DIMM connector.

You need to make the correct settings in the ETRAX 100LX R_SDRAM_CONFIG register for each new SDRAM configuration. The register is described in detail in ETRAX 100LX Designer's Reference Chapter 19. Additional help in calculating the correct values is given in the R_SDRAM_CONFIG help document.

$Date: 2001/10/26 10:42:54 $
$Revision: 1.6 $

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