Developer board layout/pinout July 2, 2001 - Johan Adolfsson +----------------------------------------------------------------+ | 5 3 1 9 7 5 3 1 9 7 5 3 1|5 3 1 9 7 5 3 1 9 7 5 3 1 +--------+-+ | 6 4 220 8 6 4 210 8 6 4 2|6 4 220 8 6 4 210 8 6 4 2 | | | +-| LPT2 / par1 | LPT1 / par0 |NETWORK | | |C| 1 2 1 2 |10/100 | | |O| 3 4 3 4 +--------+-+ |M| 5 6 5 6 +--+--+-+ |1| 7 8 7 8 |12|8 | |TX+ | | 910 910 ser3 |11| | | +-| [X7] [X4] 3.3V COM1 |10|7 | |TX- X3| COM1/ser0 | 9|6 | |RX/TX+ B | | 8| | | | RESET [X21] | 7|5 | |RX/TX- A | 1 2 [X15] | 6|4 | |422GND | _ --- --- --- 1 | 5| | | ->|O_ |O| TEST BUTTONS |O| |O| 2BOOT | 4|3 | |GND | --- -R- -B- 3 | 3|2 | |AC | RESET BOOT | 2| | | | [X18] 3.3V COM2 2 4 6 810 | 1|1 | |AC | 2 4 6 810 1 3 5 7 9 X19+X9+-+ | 1 3 5 7 9 [X25 DBG] STATUS LED|/\/ +-| COM2 FEMALE ser1 | |C| 1 2 109 POWER LED|/\/ |O| 3 4 8 7 | |M| 5 6 6 5 -----+-+ |2| 7 8 4 3 POWER | |AC9-24V | | 910 2 1 CONNECTOR | |DC9-24V +-| [X6] [X12] NLA DEBUG CONNECTOR ------+-+ X2| COM2/ser2 [X14] | +----------------------------------------------------------------+ COM1 and COM2 RS-232 ~~~~~~~~~~~~~~~~~~~~ COM1 is connected to ser0 on ETRAX 100. /dev/ttyS0 in Linux/ETRAX. COM2 is connected to ser2 on ETRAX 100. /dev/ttyS2 in Linux/ETRAX. The DTR, RI, DSR and CD signals are connected to the general port PA and PB bit 4-7. COM1 (ser0) on PB4-PB7 and COM2 (ser2) on PA4-PA7. MALE 9-pin DSUB (RS-232 levels) (X3 and X2) 1 I /CD Carrier Detect (Px7) 2 I RXD Receive Data 3 O TXD Transmit Data 1 2 3 4 5 4 O /DTR Data Terminal Ready (Px4) _______________ 5 - GND \ . . . . . / 6 I /DSR Data Set Ready (Px6) \ . . . . / 7 O /RTS Request To Send ----------- 8 I /CTS Clear To Send 6 7 8 9 9 I /RI Ring Indicator (Px5) 2x5 header (RS-232 levels) (Hidden below the DSUB connector - X7 and X6) The pinout is designed to match with a MALE DSUB 9 connector using a flat ribbon cable. 1 I /CD Carrier Detect (Px7) 2 I /DSR Data Set Ready (Px6) 3 I RXD Receive Data 4 O /RTS Request To Send 5 O TXD Transmit Data 6 I /CTS Clear To Send 7 O /DTR Data Terminal Ready (Px4) 8 I /RI Ring Indicator (Px5) 9 - GND 10 - GND COM2 FEMALE RS-232 pin header (X12) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2x5 header (RS-232 levels) The pinout is designed to match with a FEMALE DSUB 9 connector using a flat ribbon cable. 1 O /CD OUT Carrier Detect (Px7) 2 O /DTR Data Terminal Ready (Px4) 3 O TXD Transmit Data 4 I /CTS Clear To Send 5 I RXD Receive Data 6 O /RTS Request To Send 7 I /DSR Data Set Ready (Px6) 8 O /RI OUT Ring Indicator (Px5) 9 - GND 10 - GND COM1 and COM2 3.3V pin header (X4 and X18) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2x5 header (3.3V levels) 1 I /CD Carrier Detect (Px7) 2 I /DSR Data Set Ready (Px6) 3 I RXD Receive Data 4 O /RTS Request To Send 5 O TXD Transmit Data 6 I /CTS Clear To Send 7 O /DTR Data Terminal Ready (Px4) 8 I /RI Ring Indicator (Px5) 9 - GND 10 + +3.3V RS422/RS485 screw terminal block connector ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Either an 8 pin 3.81 mm (X9) or an 12 pin 2.5 mm (X19) can be mounted. The RS422/RS485 port is connected to ser3 on ETRAX 100. /dev/ttyS3 in Linux/ETRAX. The direction of the combined RX/TX pair on pin 5 and 6 on X9 (7 and 9 on X19) is controlled by the RTS signal. When RTS is active (low), the driver is set in receive mode. The combined pair is used for half duplex RS-485. X9 pinout 1 AC 2 AC 3 GND 4 RS422 GND 5 RX/TX- A 6 RX/TX+ B 7 TX- 8 TX+ X19 pinout 1 AC 2 DC POWER 3 AC 4 GND 5 +3.3V 6 RS422 GND 7 RX/TX- A 8 CTS- A or FEATURE_1 9 RX/TX+ B 10 TX- 11 CTS+ B or FEATURE_2 12 TX+ DEBUG (COMDBG) pin header (X25) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2x5 header (3.3V levels) The debug port (COMDBG) is connected to ser1 on ETRAX 100. /dev/ttyS1 in Linux/ETRAX. 1 I RXD Receive Data 2 O TXD Transmit Data 3 O /RTS Request To Send 4 I /CTS Clear To Send 5 - GND 6 - RESET 7 - GND 8 + +3.3V 9 - GND 10 - POWER_DC (approx +12V DC if you use supplied PS-B power supply) RESET X21 ~~~~~~~~~ Connect pin 1 to GND or press button to RESET. 1 I MASTER_RESET 2 - GND BOOT JUMPER X15 ~~~~~~~~~~~~~~~ Connect pin 1 and pin 2 or press button to enable Network boot during reset. 1 I BS2 2 + +3.3V 3 I BS1 LPT1 / par0 ~~~~~~~~~~~ LPT1 Pinout to match a 25 pin FEMALE D-SUB, pin 26 is the direction (output). The LPT1 port is connected to par0 on ETRAX 100. /dev/lp0 in Linux/ETRAX. The par0 port has a bidirectional buffer/driver on the data lines and the outputs are connected through inverting drivers (not OUTPUT_ENABLE). Header pinout DSUB 25 pinout 1 O -STROBE, PR_ACK 1 2 O -AUTO_FD, 14 3 - D0 2 4 I -FAULT, PR_ADR0 15 5 - D1 3 6 O -INIT, PR_INT 16 7 - D2 4 8 O -SEL_IN, 17 9 - D3 5 10 - Not connected 18 11 - D4 6 12 - GND 19 13 - D5 7 14 - GND 20 15 - D6 8 16 - GND 21 17 - D7 9 18 - GND 22 19 I -ACK, PR_REQ 10 20 - GND 23 21 I BUSY, RD_WR 11 22 - GND 24 23 I PAPER_E 12 24 - GND 25 25 I SELECT, -INTIO 13 26 O OUTPUT_ENABLE LPT2 / par1 ~~~~~~~~~~~ The LPT2 port is connected to par1 on ETRAX 100. /dev/lp1 in Linux/ETRAX. The signals are connected directly to ETRAX 100, no inverters or buffers. CAUTION! Be careful when you connect things here so you don't damage the ETRAX chip! 1 - GND 2 + +3.3V 3 - GND 4 + +3.3V 5 O -STROBE 6 - GND 7 - D0 8 - D1 9 - D2 10 - D3 11 - D4 12 - D5 13 - D6 14 - D7 15 I -ACK 16 - GND 17 I BUSY 18 O OUTPUT_ENABLE 19 O -AUTO_FD 20 I -FAULT 21 I PAPER_E 22 I SELECT 23 O -INIT 24 O -SEL_IN 25 - GND 26 + +3.3V TEST BUTTON ~~~~~~~~~~~ The TEST button is connected to general port pin PA1 (input), when the button is pressed the value will be 0, otherwise 1. STATUS LED ~~~~~~~~~~ The STATUS LED is connected to general port pin PA2 (output), when the bit is set to 0, current will be sinked through the LED and it will light. # End of file pinout.txt