Chips:

ETRAX FS

ETRAX 100LX

ETRAX 100LX MCM

History
Developer boards:

AXIS 82+ Developer Board

Axis Developer Board LX

System platforms:

AXIS 83+Device Server

Axis Device Server Platform

AXIS ETRAX 100LX

Design goal

Designed to meet demands for low cost, easy implementation and superior network performance, the ETRAX 100LX is Axis' sixth-generation optimized system-on-a-chip solution for putting peripherals on the network. The ETRAX 100LX was developed using 0.25µm ASIC technology with the best price/performance ratio available today. 

The sixth generation of the chip was specifically designed with Linux in mind and includes an MMU (Memory Management Unit) for that purpose.

The latest edition of Axis' ETRAX chip was designed with a number of basic criteria in mind:

Support higher bandwidth networks

The increasing use of network topologies such as Fast Ethernet has created the requirement to support faster speeds in Axis products. To achieve a higher data transfer rate, both the CPU and DMA functions were integrated. This has enabled Axis to simplify the design, reducing necessary program memory by a factor of 30 percent over a typical 32-bit RISC processor while lowering the cost.

Optimize performance

In order to saturate a 100 Mbit network, Axis created a packet burst architecture featuring a zero-copy network DMA structure. The integration of this structure into the overall architecture results in a network device "system-on-a-chip" capable of supporting high performance while reducing the load on the 100 MIPS-rated CPU.

The overall approach is one suited for connectivity rather than computation, supports data transfer rates of up to 200 Mbit/s (100 Mbit Ethernet full duplex), as well as a wide range of network device applications

Reliability, stability and rapid development

An ASIC approach provides the ability to build in functionality typically found in high-end communications devices. ETRAX 100LX-based products and embedded systems include a number of management utilities such as:

• A patent pending bootstrap function so units can be booted remotely over the network, even if they have no program code in memory
• A patent pending logic analyzer function for cache monitoring and real-time debugging
• Watchdog timer providing self-diagnostics and increased reliability
• A consistent development environment: The ETRAX 100LX is backwards compatible with the ETRAX 4, in order to ensure that OEM partners are able to preserve their earlier development investments

Read more about the history behind ETRAX

Performance

The innovative 100 MIPS 32-bit RISC design delivers compact code and exceptional price/performance at low power consumption. An 8-kbyte on-chip cache helps to take full advantage of the CPU performance. 

Rich variety of interface options

ETRAX 100LX has almost everything you need included

• 32 bit RISC CPU core
• 10/100 MBit Ethernet controller
• 4 asynchronous serial ports
• 2 synchronous serial ports
• 2 USB ports
• 2 Parallel ports
• 4 ATA (IDE) ports
• 2 Narrow SCSI ports (or 1 Wide)
• Support for SDRAM, Flash, EEPROM, SRAM, ...

Read more about the technical specifications

Runs the real Linux

Thanks to the included MMU, ETRAX 100LX can run the real Linux 2.4/2.6 kernels and does not rely on the uClinux patches that most other embedded CPUs use.
Read more about Linux 

Hardware design info

Technical documentation

Part numbers